SPIN: a sequential pipeline neurocomputer

Details SPIN: a sequential pipeline neurocomputer SPIN: a sequential pipeline neurocomputer

1991-04-08

1994-08-09

Fleming, Michael R.

395 11, G06F 1518

Patent

active

053373952

ABSTRACT:
A neural network architecture consisting of input weight multiplications, product summation, neural state calculations, and complete connectivity among the neuron processing elements. Neural networks are modelled using a sequential pipelined neurocomputer producing high performance with minimum hardware by sequentially processing each neuron in the completely connected network model. An N neuron network is implemented using multipliers, a pipelined adder tree structure, and activation functions. The activation functions are provided by using one activation function module and sequentially passing the N input product summations sequentially through it. One bus provides N.times.N communications by sequentially providing N neuron values to the multiplier registers. The neuron values are ensured of reaching corresponding multipliers through a tag compare function. The neuron information includes a source tag and a valid signal. Higher performance is provided by connecting a number of the neurocomputers in a parallel.

REFERENCES:
patent: 4897814 (1990-01-01), Clark
patent: 4994982 (1991-02-01), Duranton et al.
patent: 5040134 (1991-08-01), Park
patent: 5075889 (1991-12-01), Jousselin et al.
patent: 5091864 (1992-02-01), Baji et al.
patent: 5115492 (1992-05-01), Engeler
Stone, H. S., High-Performance Computer Architecture, Addison-Wesley, 1987, 102-115.
Rumelhardt et al., "Parallel Distributed Processing, vol. 1: Foundation", Cambridge, Mass.:MIT Press 1986.
J. Hopfield, "Neurons with Graded Response Have Collect . . . ", Proceedings of Nat'l Acad. of Sci., pp. 3088, 3092, May 1984.
S. Kung et al., "A Unified Systolic Arch. for Articial . . . ", Journal of Parallel and Dist. Computer, pp. 358-387, 1989.
P. Treleaven et al., "Neural Networks on Silicon", IFIP, Jun. 1989, pp. 1-10, Elsevier Science Publishers, B.V., 1990.
J. Hopfield & D. Tank, "Neural Computation of Decisions in Optimization Problems", pp. 141, 152, 1985.
Implementing Neural Nets with Programmable Logic; Vidal IEE Trans. on Acoustics . . . , vol. 36, No. 7, pp. 1180-1190, Jul. 1988.
Design of Parallel Hardware Neural Network Systems . . . , Eberhadt et al.; IJCNN: vol. 2, Jun. 18, 1989, pp. II, 183-190.

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