Sigma-delta digital-to-analog converter with reduced noise

Coded data generation or conversion – Analog to or from digital conversion – Differential encoder and/or decoder

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Details

341136, 36472416, H03M 302

Patent

active

053231570

ABSTRACT:
A sigma-delta digital-to-analog converter (DAC) (40) receives oversampled input data representative of an analog signal. The data may be optionally interpolated to a higher rate in a interpolator (41). A noise-shaping sigma-delta modulator (42) is connected to the output of the interpolator (41). The output of the modulator (42) is provided to a finite impulse response (FIR) filter (43). The FIR filter (43) has a frequency response characteristic which reduces the shaped noise and aliased components. This noise has a tendency to intermodulate back into the DAC's passband. The FIR filter (43) uses a series of flip-flops (81, 82, 83) functioning as delay elements with well-controlled timing edges. The outputs of the flip-flops (81, 82, 83) control current sources (91, 92, 93) weighted according to corresponding filter coefficients. The outputs of the current sources (91, 92, 93) are then summed in a summing device such as an amplifier (101).

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patent: 5222035 (1993-06-01), Nakase et al.

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