MOSFET buffer circuit with an improved bootstrapping circuit

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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Details

307578, 307450, H03K 424, H03K 1706, H03K 17687, H03K

Patent

active

047257466

ABSTRACT:
A semiconductor circuit has first and second MOS transistors which are connected between an output terminal and a positive and a reference power source terminal, respectively, a bootstrap capacitor connected between the output terminal and the gate of the first MOS transistor, an inverter which inverts the input signal and which supplies the inverted signal to the gate of the second MOS transistor after a predetermined delay timne, and a switching MOS transistor having a current path connected between the input terminal and the gate of the first MOS transistor. The switching MOS transistor has a threshold voltage greater than that of the second MOS transistor.

REFERENCES:
patent: 3395291 (1968-07-01), Bogert
patent: 4096584 (1978-06-01), Owen, III et al.
patent: 4122361 (1978-10-01), Clemen et al.
patent: 4129794 (1978-12-01), Dickson et al.
patent: 4390797 (1983-06-01), Ishimoto
patent: 4449066 (1984-05-01), Aoyama et al.

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