System using separate transfer circuits for performing different

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395725, 3642423, 36424231, 36424234, 364DIG1, G06F 1300, G06F 1328

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053793811

ABSTRACT:
An I/O controller for transferring data between a host processor and one or more I/O units. The controller interleaves processor command transfers (PIO) in the midst of direct memory access (DMA) transfers without repeated data moves. DMA transfers are suspended temporarily during the priority PIO transfer. An interrupt Scanner, for scanning the various I/O units, is also prioritized with respect to DMA and PIO transfers.

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EPO Search Report for EP 92 11 3591.
Schnurr, "DMA-MeBtechnik mit einem PC," Elektronik, vol. 39, No. 8, pp. 90-102.
English language abstract of "DMA-MeBtechnik mit einem PC," (Publication AS), published by INSPEC, abstract No. B90052025, C90046972, Available Online through DIALOG information Services, Inc.

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