Switching circuit and semiconductor device

Wave transmission lines and networks – Plural channel systems – Having branched circuits

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Details

333104, 333262, 327408, 327416, 327427, 327436, H01P 115

Patent

active

061149233

ABSTRACT:
Disclosed is a switching circuit which has: at least one unit circuit connected in series, the unit circuit being composed of two field-effect transistors connected in series and an inductor that has one end connected to a connection point between the two field-effect transistors and another end grounded; wherein the gates of the two field-effect transistors are commonly connected and a bias voltage to control the turning on/off of the two field-effect transistors is equally applied through a resistance to the respective gates. Also disclosed is a semiconductor device which has: at least one unit element connected in series, the unit element being composed of two field-effect transistors connected in series each of which has a source electrode and a drain electrode disposed sandwiching a gate electrode, one of the source electrode and the drain electrode being used as a common electrode, and a via hole disposed on a semiconductor substrate to connect the common electrode with a ground potential, the via hole operating as an inductor: and a resistance disposed on a gate bias line to apply a bias voltage to control the turning on/off of the two field-effect transistors equally to a plurality of the gate electrodes; wherein the plurality of the gate electrodes are commonly connected.

REFERENCES:
patent: 4733203 (1988-03-01), Ayasli
patent: 4841169 (1989-06-01), Tsironis
patent: 5012123 (1991-04-01), Ayasli et al.
patent: 5517150 (1996-05-01), Okumura
patent: 5696470 (1997-12-01), Gupta et al.
Iyama, et al.; "Inductor Merged FET Switch"; Technical Report of IEICE; Jul., 1996; pp. 21-26.

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