System for shift register clocking of analog storage cells

Details System for shift register clocking of analog storage cells System for shift register clocking of analog storage cells

1985-11-25

1987-03-31

LaRoche, Eugene R.

Oscillators

Plural oscillators

Synchronized, triggered or pulsed

331117R, 331167, 307269, 328 73, H03B 508

Patent

active

046546057

ABSTRACT:
A resonant circuit which includes the input capacitance of the clock pulse inputs of a shift register (10) is pulsed by a sinusoidal wave at voltage peaks of the wave by an oscillator delivering barely enough energy to overcome the damping of the resonant circuit. The oscillator may be crystal controlled and, instead of having a single ended output for delivering energy only on peaks of one polarity, may be in push-pull form reinforcing oscillation peaks of both polarities. This circuit is easily combined with arrangements for switching oscillator frequency from one value to another and/or arrangements for interrupting the clock pulse output for timed intervals after each loading or unloading of the shift register. The loss power dissipation is reduced to about 6% of the loss power dissipation of a square pulse drive for the clocking of the same shift register. The low loss drive for shift register advancement is applicable to a variety of analog stepped storage and delay devices, such as charge coupled devices and "bucket brigade" devices.

REFERENCES:
patent: 4158181 (1979-06-01), Balopole
Michael F. Tompsett and Edward J. Zimany, Jr., "Use of Charge-Coupled Devices for Delaying Analog Signals", Apr. 1973, IEEE Journal of Solid-State Circuits.

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