Parallel-serial data converter

Coded data generation or conversion – Digital code to digital code converters – Parallel to serial

Patent

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Details

341 93, H03M 900

Patent

active

053790383

ABSTRACT:
A parallel-serial data converter according to the present invention comprises a n-th latch circuit which latches the sign bit at the most significant bit of parallel data, a n-1th selector which selects either of the n-1th bit or the ground level, a n-1th latch circuit which latches the output from the selector n-1, a i-th selector which selects either of the i-th bit (i=n-2, n-3, . . . , 2, 1) of the parallel data or the output from the i+1th latch circuit, a i-th latch circuit which latches the output from the i-th selector, a n-th selector which selects either of the output from the first inverter to reverse the output from the first latch circuit or the output from the first latch circuit, a n+1th selector which selects either of the output from a second inverter to reverse the output from the n-th selector or the output from the n-th selector for output as serial data in two's complement notation, a set latch circuit which is set according to the STORE signal and latches the output from the first AND circuit to take the logical AND the output form the n-th selector and the selection signal as well as a second AND circuit which takes the logical AND the output from the set latch circuit and the output from the n-th latch circuit for output as the selection signal.

REFERENCES:
patent: 3631464 (1971-12-01), Dahlberg
patent: 4218758 (1980-08-01), Allen et al.
patent: 4377806 (1983-03-01), Elliott et al.
patent: 4429300 (1984-01-01), Yamasawa et al.
patent: 5128673 (1992-07-01), Tamamura et al.

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