System for generating interrupt requests from either side of an

Details System for generating interrupt requests from either side of an System for generating interrupt requests from either side of an

1996-10-21

1998-06-09

Harvey, Jack B.

395741, 395306, 395308, G06F 1324, G06F 946

Patent

active

057649979

ABSTRACT:
A method for generating an interrupt to a plurality of peripheral devices in a computer system, the computer system comprising a first bus, a bus bridge for coupling to the first bus and for interfacing to a second bus, a second bus coupled to the bus bridge, and a plurality of peripheral devices connected to the second bus. The method comprises activating a source port in the bus bridge to configure the source port in the bus bridge for a transfer. The bus bridge receives from the first bus and stores an encoded interrupt vector in a register of the source port. The encoded interrupt vector is indicative of one or more interrupt requests at a target peripheral device. The bus bridge transmits an address/data pair to a destination port of the target peripheral device. The address/data pair includes an address of the destination port and encoded interrupt vector received from the first bus. The bus bridge transmits the address/data pair in response to storing the encoded interrupt vector in a buffer in the bus bridge. The target peripheral device stores the encoded interrupt vector in a register of its destination port. The target peripheral device reads the encoded interrupt vector and executes at least one interrupt responsive to reading the encoded interrupt vector.

REFERENCES:
patent: 5613126 (1997-03-01), Schmidt
patent: 5640570 (1997-06-01), St. Clair et al.
patent: 5664117 (1997-09-01), Shah et al.
PCI Local Bus Multimedia Design Guide, Revision 1.0, Mar. 29, 1994, pp. 1-40.
Peripheral Components, Intel, Jan. 1995, pp. ix, 1-1 through 1-72.

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