Method for testing a semiconductor device on a universal test ci

Details Method for testing a semiconductor device on a universal test ci Method for testing a semiconductor device on a universal test ci

1993-02-02

1995-01-03

Karlsen, Ernest F.

Electricity: measuring and testing

Fault detecting in electric circuits and of electric components

Of individual circuit component or element

3241581, 361772, G01R 3102, H01R 900

Patent

active

053789814

ABSTRACT:
A low cost method is used to standardize testing of bare semiconductor devices. In one embodiment, a universal test circuit substrate (10) having an interleaving fan-out pattern of conductive traces (14) is provided. The radial array of conductive traces terminates in a plurality of test pads (16) placed in a standard pattern around a periphery of a central die accommodating region. A die cavity (36), slightly larger than the size of a semiconductor die (32) to be tested, is formed in the central die accommodating region. The semiconductor die is placed approximately centered in the die cavity and is wire bonded (40) to individual traces of the pattern of conductive traces. The die can be tested and burned-in on the universal test circuit substrate with a test probe making contact with the test pads. The universal test circuit substrate can accommodate a multiplicity of die sizes and pin-out requirements of semiconductor devices.

REFERENCES:
patent: 5002895 (1991-03-01), LeParquier et al.
patent: 5025212 (1991-06-01), Gloanec et al.
patent: 5061988 (1991-10-01), Rector
patent: 5121053 (1992-06-01), Shreeve et al.

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