Patent
1996-04-01
1998-06-09
Sheikh, Ayaz R.
395286, 39520068, G06F 300
Patent
active
057649308
ABSTRACT:
A computer system includes a plurality of nodes, each having an associated unique identification and bus address, interconnected by point-to-point links. Device data records are maintained in a memory of the computer system wherein node unique identifications, which are bus reset invariant, are associated with corresponding node bus addresses, which are subject to change with bus resets. A driver associated with a source node initiates a bus transaction and specifies a reference identification for the destination node. The reference identification of the destination node is used to access the device data records to obtain the corresponding destination node bus address. When a bus transaction cannot be completed because a bus reset occurs, the device data records are updated to associate the new bus addresses of the nodes with the corresponding node unique identifications. The new destination node bus address is used to complete the bus transaction that was interrupted by the bus reset.
REFERENCES:
patent: 5394556 (1995-02-01), Oprescu
patent: 5579486 (1996-11-01), Oprescu et al.
ISO/IEC 13213 ANSI/IEEE Standard 1212, "Information Technology-Microprocessor Systems-Control and Status Registers (CSR) Architecture For Microprocessor Buses", First Edition, pp. 1-125, (Oct. 5, 1994).
Philips Electronics et al, Digital Interface for Consumer Electronic Audio/Video Equipment Draft Version 2.0, IEEE 1394 Trade Association Meeting, pp. 1-47, Part 2-pp. 1-6, (Oct. 1995).
High Performance Serial Bus Working Group of the Microprocessor and Microcomputer Standards Committee, "P1394 Standard for a High Performance Serial Bus", P1394 Draft 8.0v3, pp. 1-364, (Oct. 16, 1995).
Apple Computer, Inc., "Interim Draft, Designing PCI Cards and Drivers for Power Macintosh Computers", A8 Draft-Preliminary Information, pp. 1-372, (Mar. 9, 1995).
Apple Computer, "Inside Macintosh", Nov. 1994, pp. 3-3-3-48, Chapter 3 entitled, SCSI Manager.
"Information Technology-Microprocessor Systems-Control and Status Registers (CSR) Architecture For Microcomputer Buses", IEEE 121210/94, pp. 3-125.
"Standard For A High Performance Serial Bus", IEEE 1394, Oct. 1995, pp. 1-364.
Apple Computer, "Designing PCI Cards and Drivers For Power Macintosh Computers", Mar. 1995, pp. 4-365.
Apple Computer Inc.
Dharia Rupal D.
Sheikh Ayaz R.
LandOfFree
Method and apparatus for providing reset transparency on a recon does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method and apparatus for providing reset transparency on a recon, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and apparatus for providing reset transparency on a recon will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2212902