System for determining and controlling the input/output mode of

Details System for determining and controlling the input/output mode of System for determining and controlling the input/output mode of

1993-04-08

1997-03-25

Lee, Thomas C.

395250, 395800, G06F 1502

Patent

active

056153902

ABSTRACT:
In an input/output circuit of a microcomputer, an output latch is connected to an internal bus for latching an output data signal. An output tristate buffer has an input connected to receive a latched output data signal from the output latch and an output connected to the input/output terminal. An input tristate buffer is connected at its input to the input/output terminal. An input/output switchover latch is connected to the internal bus for generating a switchover signal, which is supplied directly to a control input of the output buffer and also through an inverter to a control input of the input buffer, so that the output buffer and the input buffer are alternatively activated by the switchover signal in a complementary manner. The input/output switchover latch is initialized in response to an active reset signal. A reset signal level change point detection circuit receives the reset signal for detecting a point at which the reset signal returns from its active level to its inactive level, and for generating a second reset signal to the output latch, so that after the input/output switchover latch has been initialized in response to the reset signal, the output latch is initialized by the second reset signal.

REFERENCES:
patent: 4672583 (1987-06-01), Nakaizumi
patent: 4835743 (1989-05-01), Hidaka et al.
patent: 5155810 (1992-10-01), McNamara et al.
patent: 5175533 (1992-12-01), Krenik
patent: 5214330 (1993-05-01), Okazaki
patent: 5233241 (1993-08-01), Nishimori
patent: 5369611 (1994-11-01), Miura

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