Computer system with automatic degradation/initialization functi

Details Computer system with automatic degradation/initialization functi Computer system with automatic degradation/initialization functi

1995-01-24

1997-03-25

Donaghue, Larry D.

39518201, 39518221, 39518313, 395651, G06F 1516, G06F 1122

Patent

active

056153708

ABSTRACT:
A computer system is provided which is equipped with a plurality of CPUs and has an automatic degradation/initialization function, wherein even if fault occurs in any of the CPUs, the system can be automatically initialized to perform a task that is executable by the remaining CPUs. When power is supplied to the computer system, a CPU monitor and control unit isolates a faulty CPU among the CPUs. A minimum number storing unit previously stores a minimum number of CPUs required for accomplishing a predetermined task. A comparing unit compares the number of normal CPUs with the minimum number of CPUs stored in the minimum number storing unit. When the number of normal CPUs is greater than or equal to the minimum number of CPUs, an initialization control unit judges that the system can be initialized, and thus initializes the computer system; when the number of normal CPUs is smaller than the minimum number of CPUs, the initialization control unit judges that the system cannot be initialized, and thus suspends the initialization of the computer system.

REFERENCES:
patent: 4445197 (1984-04-01), Lorie et al.
patent: 5179715 (1993-01-01), Andoh et al.
patent: 5247675 (1993-09-01), Farvell et al.
patent: 5392430 (1995-02-01), Chen et al.
patent: 5452461 (1995-09-01), Umekita et al.
patent: 5528761 (1996-06-01), Ooba et al.
Abstract of Japanese Publication 1-224861 dated Sep. 7, 1989.

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