Electrical pulse counters – pulse dividers – or shift registers: c – Systems – Pulse multiplication or division
Patent
1991-09-11
1993-02-23
Heyman, John S.
Electrical pulse counters, pulse dividers, or shift registers: c
Systems
Pulse multiplication or division
377 47, 377 49, H03K 2366
Patent
active
051896850
ABSTRACT:
A counter/divider dividing an input frequency (F1) by 2.sup.q+n +1/2, comprises a first divider by 2.sup.q (30) receiving the signal to divide of a frequency F1 and provides 2.sup.q+1 outputs at the frequency F1/2.sup.q out of phase the ones to the others of 360.degree./2.sup.q+1 ; a multiplexer (32) having a control terminal (34) and sequentially providng at its output (33) each of said 2.sup.q+1 outputs each time a control signal is applied; and a second divider by 2.sup.n (31) receiving the output (33) of the multiplexer and providing the desired output (34) of the counter/divider, this output being applied to the control terminal of the multiplexer.
REFERENCES:
patent: 4034302 (1977-07-01), May
patent: 4084082 (1978-04-01), Alfke
patent: 4587664 (1986-05-01), Iida
patent: 4633194 (1986-12-01), Kikuchi et al.
Jaffard Jean-Luc
Lietar Loic
Mouret Michel
Heyman John S.
SGS-Thomson Microelectronics S.A.
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