Horology: time measuring systems or devices – Combined with disparate device
Patent
1995-06-05
1997-03-25
Miska, Vit W.
Horology: time measuring systems or devices
Combined with disparate device
368 46, 368156, 375356, G04B 4700, G04F 500, H04L 700
Patent
active
056151772
ABSTRACT:
A clock synchronizing apparatus is constructed of a multi-input PLL circuit. The multi-input PLL circuit comprises a phase comparator, a variable frequency oscillator, a loop filter, and an adding device. The phase comparator includes a plurality of subtracting devices for subtracting an output signal from each of input signals and a plurality of amplifiers for obtaining a phase comparison characteristic corresponding to the output signal of each subtracting device and for amplifying each phase comparison characteristic by a predetermined gain. Each gain is predetermined for each input signal. One dominant gain is greater than the sum of the other gains.
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Debasis Mitra, "Network Synchronization: Analysis of a Hybrid of Master-Slave and Mutual Synchronization", IEEE Transactions on Communications, 28(8):1245-1259 (1980).
Kabushiki Kaisha Toshiba
Miska Vit W.
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