Pipelined analog to digital converters and interstage amplifiers

Details Pipelined analog to digital converters and interstage amplifiers Pipelined analog to digital converters and interstage amplifiers

1997-01-14

1998-06-09

Young, Brian K.

Coded data generation or conversion

Analog to or from digital conversion

Analog to digital conversion

341162, H03M 142

Patent

active

057641765

ABSTRACT:
An interstage amplifier for a pipelined analog-to-digital converter comprises an operational amplifier (50) having two balanced amplifying paths; a first pair of capacitors (55,58); a second pair of capacitors (56,57); and switching means (59-62) connected to the capacitors and said amplifier and arranged for: (i) during a first phase, enabling the first pair of capacitors (55,58) to receive a respective first sample of a first signal; (ii) during a second phase, enabling the second pair of capacitors (56,57) to receive a second sample of the first signal; (iii) during a third phase, enabling the first pair of capacitors (55,58) to receive a first sample of a second or reference signal and to enable charge to be transferred from each of the first pair of capacitors by way of a respective path of the amplifier to a respective one of the second pair of capacitors; and (iv) during a fourth phase, enabling the second pair of capacitors (56,57) to receive a second sample of the said second or reference signal and to enable charge to be transferred from each of the second pair of capacitors by way of a respective path of the amplifier to the respective one of the first pair of capacitors. The arrangement provides first-order correction of capacitor mismatch.

REFERENCES:
patent: 5047772 (1991-09-01), Ribner
patent: 5594445 (1997-01-01), Ginetti
"A CMOS 13-b Cyclic RSD A/D Converter" IEEE Journal of Solid State Circuits, Ginetti et al., vol. 27, No. 7, Jul. 1992, pp. 957-965.
"A 12-bit 1--Msample/s Capacitor Error--Averaging Pipelined A/D Converter", IEEE Journal of Solid State Circuits, Song et al., Dec., 1988, pp. 1324-1333.
"A 13-b 2.5 MHz Self-Calibrated Pipelined A/D Converter in 3.mu.m CMOS", IEEE Journal of Solid State Circuits, Lin et al., Apr. 1991, pp. 628-636.
"A Pipelined 13-bit, 250-ks/s, 5-V Analog-to-Digital Converter", IEEE Journal of Solid State Circuits, Sutarja et al., Dec. 1988, pp. 1316-1323.

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