Clock extraction and data regeneration logic for multiple speed

Details Clock extraction and data regeneration logic for multiple speed Clock extraction and data regeneration logic for multiple speed

1992-11-20

1994-12-06

Bocure, Tesfaldet

Pulse or digital communications

Spread spectrum

Direct sequence

375120, 327166, 327291, H03D 324

Patent

active

053717660

ABSTRACT:
Clock extraction and data regeneration logic is provided for a multiple rate digital data communications system such as a local area network (LAN). The logic is implemented in adapters which connect stations in the LAN to other stations in the LAN via transmission media such as wire or fiber optic cable. The clock extraction and data regeneration logic is adapted to quickly recognize the speed at which the token ring is operating, thereby preventing a station on the ring from sending data onto the ring at a rate which does not match the operating frequency of the ring. The logic also performs, at multiple speeds of operation, clock extraction and data reconstruction of a signal received from another station in the ring.

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