Flexible dram access in a frame buffer memory and system

Details Flexible dram access in a frame buffer memory and system Flexible dram access in a frame buffer memory and system

1994-05-03

1996-08-06

Powell, Mark R.

395162, G06F 1200

Patent

active

055443060

ABSTRACT:
A frame buffer dynamic random access memory (FBRAM) is disclosed that enables accelerated rendering of Z-buffered graphics primitives. The FBRAM converts read-modify-write transactions such as Z-buffer compare and RBG alpha blending into a write only operation. The FBRAM also implements two levels of internal pixel caches, and a four-way interleaved frame buffer.

REFERENCES:
patent: 4941107 (1990-07-01), Hasebe
patent: 5131080 (1992-07-01), Fredrickson et al.
patent: 5388073 (1995-02-01), Usami et al.
A. Goris et al. "A Configurable Pixel Cache for Fast Image Generation" IEEE CG&A, Mar. 1987, pp. 24-32.
M. Deering et al. "FBRAM: A new form of Memory Optimized for 3D Graphics" SIGGRAPH 94, Jul. 24-29, 1994, pp. 167-174.

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