Cache memory system and method with multiple hashing functions a

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39542106, 395435, 395460, 364DIG1, 36424341, 3642447, 3642558, 3642598, G06F 1210, G06F 1208

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active

055309585

ABSTRACT:
A column-associative cache that reduces conflict misses, increases the hit rate and maintains a minimum hit access time. The column-associative cache indexes data from a main memory into a plurality of cache lines according to a tag and index field through hash and rehash functions. The cache lines represent a column of sets. Each cache line contains a rehash block indicating whether the set is a rehash location. To increase the performance of the column-associative cache, a content addressable memory (CAM) is used to predict future conflict misses.

REFERENCES:
patent: 5235697 (1993-08-01), Steely, Jr. et al.
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Kessler, et al., "Inexpensive Implementations of Set-Associativity," Computer Architecture News 17(3): 131-139 (Jun. 1989).
da Silva, et al., "Pseudo-associative Store with Hardware Hashing," IEE Proceedings E. Computers & Digital Techniques 130(1): 19-24 (Jan. 1983).
Anant Agarwal and Steven D. Pudar, "Column-Associative Caches: A Technique for Reducing the Miss Rate of Direct-Mapped Caches." In Proceeding ISCA 1993 (Abstract).
Anant Agarwal et al., "Cache Performance of Operating System and Multiprogramming Workloads," ACM Transactions on Computer Systems, 6(4): 393-431, Nov., 1988.
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Kimming So and Rudolph N. Rechtschaffen, "Cache Operations by MRU Change," (Research Report #RC11613 (#51667) Computer Science, pp. 1-19, (Nov. 13, 1985). Yorktown Heights, NY: IBM T. J. Watson Research Center.
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