Bus interface circuit

Details Bus interface circuit Bus interface circuit

1994-05-19

1996-06-25

Harvey, Jack B.

H01J 1300

Patent

active

055308120

ABSTRACT:
A bus interface circuit is for coupling between a microprocessor having an architecture in which address and data buses are separated and peripheral equipment having a multiplexing bus architecture. The bus interface circuit includes a first delay circuit for delaying a first address strobe signal of a microprocessor to obtain a first data strobe signal, a second delay circuit for delaying the first data strobe signal to obtain a second data strobe signal for the peripheral equipment, a logic circuit for multiplying an inverted first data strobe signal and the first address strobe signal to obtain a second address strobe signal for the peripheral equipment, a first buffer enabled by the first data strobe signal for transmitting address data of the microprocessor, and second buffer means enabled by the second address strobe signal for transmitting and receiving data information between the microprocessor and the peripheral equipment.

REFERENCES:
patent: 5016219 (1991-05-01), Nolan et al.
patent: 5060239 (1991-10-01), Briscoe et al.
patent: 5388250 (1995-02-01), Lewis et al.

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