Fishing – trapping – and vermin destroying
Patent
1987-10-21
1988-12-13
Chaudhuri, Olik
Fishing, trapping, and vermin destroying
437235, 437238, H01L 2940, H01L 2978
Patent
active
047910712
ABSTRACT:
A dual dielectric gate system utilizes a dual dielectric system with a first silicon dioxide dielectric film or layer at the monocrystalline substrate surface, or termination. The substrate is of silicon optionally counterdoped with germanium. The dual dielectric system includes a dielectric film at the substrate surface of thicknesses of from 200 .ANG. to 1000 .ANG. (or greater). A layer of undoped amorphous silicon and a second layer of silicon dioxide, respectively overlie the first layer silicon dioxide, and an aluminum gate metal layer overlies the second silicon dioxide layer. The structure can be patterned by selectively patterning photoresist and a dry or a dry/wet etch processes. The structure is patterned and etched as desired. The system has enhanced surface mobilities due to lower oxide fixed charge density and a higher dielectric breakdown strength, is applicable to wide variety of MOSFET applications, and is inherently less electrostatic discharge (ESD) sensitive than conventional gate structures due to the distributed electric field.
REFERENCES:
patent: 3649884 (1972-03-01), Haneta
patent: 3996656 (1976-12-01), Cook, Jr.
patent: 4444467 (1984-04-01), Shuskus et al.
patent: 4707721 (1987-11-01), Ang et al.
Learn, J. Electrochem. Soc., vol. 132, No. 2, (Feb. 1985), pp. 390-393.
Braden Stanton C.
Chaudhuri Olik
Comfort James T.
Sharp Melvin
Texas Instruments Incorporated
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