Semiconductor memory device having detection circuitry for sensi

Static information storage and retrieval – Addressing – Particular decoder or driver circuit

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365201, G11C 800

Patent

active

053717120

ABSTRACT:
A semiconductor memory device facilitated with a test circuit having a simple construction of a plurality of MOSFETs having their individual gates connected with a plurality of word lines in a memory array; and a testing pad for detecting the presence of an electric current flowing between the sources and drains of the plurality of MOSFETs. If the word line is short-circuited to the power supply to achieve an intermediate potential equal to or higher than the threshold voltage of the MOSFETs, an electric current will flow through the MOSFETs so that the presence of the short-circuit between the word lines and the power supply can be accurately detected.

REFERENCES:
patent: 4905194 (1990-02-01), Ohtsuka
patent: 5142496 (1992-08-01), Van Buskirk

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