Instruction memory system for RISC microprocessor capable of pre

Details Instruction memory system for RISC microprocessor capable of pre Instruction memory system for RISC microprocessor capable of pre

1994-03-03

1994-12-06

Fears, Terrell W.

Electricity: electrical systems and devices

Electric charge generating or conducting means

36518905, 36523008, G11C 1300

Patent

active

053717112

ABSTRACT:
In a memory system including a memory cell array, a row decoder and a column decoder, a first shift register receives a first value outputted from said row decoder, to output a first shifted value obtained by shifting said first value, to said memory cell array for access to said memory cell array, and a second shift register receiving a second value outputted from said column decoder, to output a second shifted value obtained by shifting said second value, to said memory cell array for access to said memory cell array. A shift control logic responds to advance of said program and an branch instruction for controlling the shift of said first and second shift registers.

REFERENCES:
patent: 4694428 (1987-09-01), Matsumura et al.

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