Boots – shoes – and leggings
Patent
1991-04-10
1993-09-28
Trans, Vincent N.
Boots, shoes, and leggings
364488, G06F 1560
Patent
active
052491331
ABSTRACT:
The present invention takes advantage of the hierarchical nature of the design to perform a hierarchical comparison on as many blocks and sub-blocks which can be matched between the layout and the logic design. Because the internal connections were previously verified when the first occurrence of the block was compared, repetition of lengthy comparisons of multiple occurrences of the same blocks in the designs is avoided and subsequent comparisons are performed simply by comparing the input and output connections to the block.
REFERENCES:
patent: 4827427 (1989-05-01), Hyduke
patent: 5005136 (1991-04-01), Van Berkel et al.
patent: 5067091 (1991-11-01), Nakazawa
patent: 5084824 (1992-01-01), Lam et al.
patent: 5164908 (1992-11-01), Igarashi
"Hierarchical Functional Verification for Cell-Based Design Styles" by Chen et al., IEEE Proceedings, vol. 134, Pt. G, No. 2, Apr. 1987, pp. 103-109.
"Programs for Verifying Circuit Connectivity of MOS/LSI Mask Art Work" by Takashima et al., IEEE 19th Design Automation Conf., 1982, pp. 544-550.
"Automatic Generation of Digital System Schematic Diagrams" by A. Arya et al., IEEE 22nd Design Automation Conf., 1985, pp. 388-395.
Sun Microsystems Inc.
Trans Vincent N.
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