Shared interface apparatus for testing the memory sections of a

Details Shared interface apparatus for testing the memory sections of a Shared interface apparatus for testing the memory sections of a

1982-03-31

1986-03-11

Chan, Eddie P.

Boots, shoes, and leggings

371 21, G06F 1100, G06F 1300

Patent

active

045757925

ABSTRACT:
The circuits of a cache unit constructed from a single board are divided into a cache memory section and a controller section. The cache unit is connectable to the central processing unit (CPU) of a data processing system through the interface circuits of the controller section. Test mode logic circuits included within the cache memory section enable cache memories to be tested without controller interference utilizing the same controller interface circuits.

REFERENCES:
patent: 4167779 (1979-09-01), Sullivan et al.
patent: 4190885 (1980-02-01), Joyce et al.
patent: 4357656 (1982-11-01), Saltz et al.
patent: 4392201 (1983-07-01), Brown et al.

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