Video scrambler system

Details Video scrambler system Video scrambler system

1983-01-06

1986-03-11

Buczinski, S. C.

Facsimile and static presentation processing

Facsimile

Specific signal processing circuitry

358122, 358123, 179 155, 178 2204, 178 2205, 178 2215, H04N 7167

Patent

active

045757542

ABSTRACT:
A video signal is scrambled by partitioning the signal into blocks of segments, reversing the sequence of segments in each block, randomly delaying the reversed segments and reversing the sequence of the randomly delayed segments. The double reversal of the block segment sequence results in a scrambled signal of high security but which may be unscrambled by a decoder having a complementary random delay characteristic and a total segment storage capacity which is less than that of the scrambler and also less than the maximum line-to-line interchange of the segments within each block. Selection of segment lengths provides inter-line or intra-line block scrambling.

REFERENCES:
patent: 2879324 (1959-03-01), Hoffman et al.
patent: 2961481 (1960-11-01), Hammond, Jr. et al.
patent: 2972008 (1961-02-01), Ridenour et al.
patent: 3379825 (1968-04-01), Banning, Jr.
patent: 4070693 (1978-01-01), Shutterly
patent: 4173025 (1979-10-01), Prehn
patent: 4245246 (1981-01-01), Cheung
patent: 4392021 (1983-07-01), Slate
patent: 4405942 (1983-09-01), Block et al.

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