Symmetrical differential amplifier circuit

Amplifiers – With semiconductor amplifying device – Including differential amplifier

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307530, 365205, H03F 345

Patent

active

052489469

ABSTRACT:
An amplifier circuit of a symmetrical type is implemented with load transistors 1, 3, 5, 6 and input transistors 2, 4. Load transistors 1, 5 and input transistor 2 constitute a first inverter, and load transistors 3, 6 and input transistor 4 constitute a second inverter. A change in the output potential of each inverter is transmitted to a load transistor of the other inverter and increases the fluctuation of the potential of an output signal. A transistor 9 or 10 for current control is arranged between an input transistor and ground or between a load transistor and a power supply. The transistor 9 or 10 for current control interrupts through current when operation of the amplifier circuit is unnecessary and enhances the gain when the amplifier circuit is on operation. The gain is enhanced by setting the conductance of the load transistor and the conductance of the input transistor on predetermined conditions. Furthermore, an offset voltage caused in each amplifier circuit is canceled out by connecting two sets of symmetrical-type amplifier circuits.

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patent: 4973864 (1990-11-01), Nogami
"A 9ns 1Mb CMOS SRAM", by Sasaki et al., 1989 IEEE International Solid State Circuits Conference, Digest of Technical Papers, Feb. 15, 1989, pp. 34-35.
"A 15ns 4Mb CMOS SRAM", by Aizaki et al., 1990 IEEE International Solid State Circuits Conference, Digest of Technical Papers, Feb. 15, 1990, pp. 126-127.

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