Patent
1981-12-21
1984-11-20
Edlow, Martin H.
357 38, 357 50, 357 48, 357 55, 357 73, H01L 2934, H01L 2704, H01L 2974, H01L 2906
Patent
active
044842147
ABSTRACT:
A semiconductor device is provided having a semiconductor substrate which has an annular moat formed in one major surface thereof and includes a pn junction terminating at an inner inclined side surface of the moat. In order to provide a high blocking voltage of the pn junction, the moat is filled or coated with glass material having a surface charge capable of inducing, in a semiconductor layer of one conductivity type in contact with the bottom of the moat, carriers having a polarity opposite to the above-mentioned conductivity type. An annular, highly-doped channel stopper region of the above-mentioned conductivity type is provided at the outside of the moat in a manner to be kept in contact with the moat, and the depth of the channel stopper region from the major surface is preferably made greater than the depth of the pn junction from the major surface.
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Hachino Hiroaki
Misawa Yutaka
Takahashi Masaaki
Edlow Martin H.
Hitachi , Ltd.
Jackson, Jr. Jerome
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