Oxide walled emitter

Details Oxide walled emitter Oxide walled emitter

1983-10-17

1984-11-20

Larkins, William D.

357 34, 357 55, 357 59, 357 20, H01L 2704, H01L 2904, H01L 2972

Patent

active

044842112

ABSTRACT:
A semiconductor integrated circuit device in which the side surfaces of an emitter of an oxide isolated bipolar transistor are surrounded with insulating compounds or regions so that the capacitance between the emitter and base is lowered and a base is formed by the self-alignment so that the influence of an active base between an external base and the emitter can be made negligible. Thus the base resistance and parasitic capacitance are lowered.

REFERENCES:
patent: 4160991 (1979-07-01), Anantha et al.
patent: 4214315 (1980-07-01), Anantha et al.
patent: 4231819 (1980-11-01), Raffel et al.
patent: 4255207 (1981-03-01), Nicolay et al.
patent: 4269636 (1981-05-01), Rivoli et al.
patent: 4318751 (1982-03-01), Horng
Cosand, "Very High Speed . . . Bipolar . . . ", IEEE International Electron Dev. Meeting, Technical Digest, Dec. 1973, pp. 35-37.

Affiliated with

Also associated with

Rating

Oxide walled emitter does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Oxide walled emitter, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Oxide walled emitter will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2192061