Receiving control logic system for dual bus network

Details Receiving control logic system for dual bus network Receiving control logic system for dual bus network

1992-12-04

1995-08-15

Harvey, Jack B.

Boots, shoes, and leggings

364DIG1, 3642386, 3642391, 364240, 3642408, 364247, G06F 1300

Patent

active

054427541

ABSTRACT:
A system for controlling and routing messages and data received from dual system busses, through a bus interface unit, to a protocol translation logic means and to a processor in a central processing module connected onto a dual system bus network. The processor operates at a first clock rate and on a single-word communication protocol while the translation logic means operates at a second rate and multiple-word communication protocol. The processor and translation logic are destination modules which receive the benefit of the receiving control logic system. The receiving control logic system also services external modules on the system bus in order to receive data and control the routing of data to the destination modules. Destination modules which are busy and not ready will cause the system to inform the external transmitting modules that they must retry their transmission. The system also checks the quality of the data on the system busses and informs the processor when errors have been incurred, in addition to informing the originating modules when a transmitted message has been completed.

REFERENCES:
patent: 3980993 (1976-09-01), Bredart et al.
patent: 4245344 (1981-01-01), Richter
patent: 4511969 (1985-04-01), Koenig et al.
patent: 4853846 (1989-08-01), Johnson et al.
patent: 4864496 (1989-09-01), Triole et al.
patent: 4897786 (1990-01-01), Pimm et al.
patent: 4918597 (1990-04-01), Krishnan et al.
patent: 4935894 (1990-06-01), Ternos et al.
patent: 4982321 (1991-01-01), Pantry et al.
patent: 5070443 (1991-12-01), Priem et al.
patent: 5072369 (1991-12-01), Theus et al.
patent: 5073852 (1991-12-01), Siegel et al.
patent: 5086499 (1992-02-01), Mutoni
patent: 5191653 (1993-03-01), Banks et al.
patent: 5245703 (1993-09-01), Hubert
patent: 5255374 (1993-10-01), Aldereguia et al.

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