Fishing – trapping – and vermin destroying
Patent
1995-01-23
1996-06-25
Fourson, George
Fishing, trapping, and vermin destroying
437203, 437208, 437225, 437915, 437974, 205656, 205665, H01L 21288, H01L 2160
Patent
active
055299504
ABSTRACT:
A method used in manufacturing a cubically integrated circuit arrangement. A silicon wafer, wherein through pores are produced by electrochemical etching are insulated from the silicon wafer, and are provided with conductive fills, is secured as a carrier plate (24) to a substrate (21) that has components and that is integrated in a cubically integrated circuit arrangement. Terminal pads (25) that are electrically connected to conductive fills and that are arranged on the surface of the carrier plate (24) thereby meet contacts (23) to the components that are arranged at the surface of the substrate (21) adjoining the carrier plate (24) and that are firmly connected thereto.
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Hoenlein Wolfgang
Schwarzl Siegfried
Fourson George
Graybill David E.
Siemens Aktiengesellschaft
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