Fishing – trapping – and vermin destroying
Patent
1994-03-28
1996-06-25
Hearn, Brian E.
Fishing, trapping, and vermin destroying
437 34, 437 56, H01L 218234
Patent
active
055299415
ABSTRACT:
A method for making an integrated circuit in accordance with the present invention comprises fabricating at least one functional MOSFET with a hot electron resistant structure including a lightly doped drain, fabricating at least one output MOSFET with an ESD resistant structure including a gate means without associated spacers, and electrically coupling at least one functional MOSFET to at least one output MOSFET. An integrated circuit structure in accordance with the present invention includes at least one functional MOSFET having a hot electron resistant structure including a LDD drain, at least one output MOSFET having an ESD resistant structure including a gate means without associated spacers, and means for electrically coupling the two together. The functional MOSFET includes a gate insulator, a conductive gate region over the gate insulator, spacers along the sidewalls of the gate insulator and conductive gate regions, a pair of LDD regions, and source/drain regions. The output MOSFET includes a gate insulator, a conductive gate region over the gate insulator, and source/drain regions. A further method for making an integrated circuit structure includes the step of creating a plurality of NMOS and PMOS gate structures including at least one NMOS gate structure for an ESD transistor. The method further includes making a PMOS LDD implant, making an NMOS LDD implant, creating spacers on the NMOS and PMOS gate structures, removing the spacers from the NMOS gate structure(s) for an ESD transistor, and making source/drain implants for the NMOS and PMOS gate structures.
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Hearn Brian E.
Trinh Michael
VLSI Technology Inc.
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