Calculating circuit for error correction

Details Calculating circuit for error correction Calculating circuit for error correction

1992-12-10

1995-08-15

Gordon, Paul P.

Boots, shoes, and leggings

371 371, G06F 700, G06F 1500

Patent

active

054425786

ABSTRACT:
A Euclidean mutual division circuit that has (2t+1) calculation units and (2t+3) registers for error correction where t is the number of symbols that can be error-corrected. The division unit and each calculation unit conduct Euclidean mutual divisions of either a normal-connection, a cross-connection, or a shift-connection division as directed by a control unit. The final calculation unit outputs a value to a division unit which divides it by another value, then the result of the division is returned to each of the calculation units. Registers that store the inputs for the Euclidean mutual division method include A-side and B-side registers. A-side registers store the coefficients of polynomials Qi(X) and .lambda.i(X), and B-side registers store those of Ri(X) and .mu.i(X). The Euclidean mutual division circuit has a reduced circuit scale for high-speed operation and for increased throughput.

REFERENCES:
patent: 4975867 (1990-12-01), Weng
patent: 4989171 (1991-01-01), Hollmann
patent: 4994995 (1991-02-01), Anderson et al.
Howard M. Shao, et al. "A VSLI Design of a Pipeline Reed Solomon Decoder" IEEE Trans on Computers vol. C-34, May 1985.
UK Patent Application GB 2 259 378 A (Hattori).

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