Process for manufacturing a plug-diode mask ROM

Details Process for manufacturing a plug-diode mask ROM Process for manufacturing a plug-diode mask ROM

1994-06-27

1995-08-15

Fourson, George

Fishing, trapping, and vermin destroying

H01L 21329

Patent

active

054419077

ABSTRACT:
A method of manufacture of a Mask ROM on a semiconductor substrate comprises formation of a first plurality of conductor lines in a first array. A dielectric layer is formed upon the device with a matrix of openings therein in line with the first array. The openings expose the surface of the first conductor lines. Semiconductor diodes are formed in the matrix of openings in contact with the first conductor lines. A second plurality of conductor lines are formed on the surface of the dielectric layer in a second array of conductor lines orthogonal to the first plurality of conductor lines in the first array. A second plurality of conductor lines is aligned with the matrix and is in contact with the upper ends of the semiconductor diodes.

REFERENCES:
patent: 3717852 (1973-02-01), Abbas et al.
patent: 4217374 (1980-08-01), Ovshinsky et al.
patent: 4219836 (1980-08-01), McElroy
patent: 4646266 (1987-02-01), Ovshinsky et al.
patent: 4727409 (1988-02-01), Conner et al.
patent: 4859633 (1989-08-01), Bayraktaroglu
patent: 5272370 (1993-12-01), French

Affiliated with

Also associated with

Rating

Process for manufacturing a plug-diode mask ROM does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Process for manufacturing a plug-diode mask ROM, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Process for manufacturing a plug-diode mask ROM will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2181446