Power and time saving initial tracebacks

Details Power and time saving initial tracebacks Power and time saving initial tracebacks

1993-11-16

1996-02-06

Tse, Young

Pulse or digital communications

Receivers

Particular pulse demodulator or detector

371 43, H04L 2706, H03M 1312

Patent

active

054901782

ABSTRACT:
A digital communication system including a Viterbi decoder for tracing a path through a trellis of individual state information and method of operation are disclosed. The traceback determines a decoded symbol. A trellis of branch origin data is stored in an array of registers. The branch origin data associated with a symbol instant is a cell. Each cell of data is generated by execution of an update instruction form a digital signal process (DSP) to the coprocessor. A first predetermined traceback length is written to a traceback length register. The first predetermined traceback length is small to minimize tracebacks cycling into branch origin data from a previous transmission burst. A traceback is initiated by the DSP providing the coprocessor a single traceback instruction. The Viterbi decoder alternates between update and traceback instructions. At a predetermined symbol instant, the traceback length is increased to a second predetermined length by over-writing the traceback length register. The second predetermined length is selected relative to the predetermined symbol instant to assure tracebacks do not cycle into branch origin data from a previous transmission burst. After all updates are complete, the update instruction is omitted and the traceback instruction repeatedly executed until all symbols from a transmission burst are decoded.

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Journal of VLSI Signal Processing, vol. 5, No. 1, Jan. 1993, Dordrecht NL, pp. 85-94, XP364288, R. Cypher/C. B. Shung: "Generalized Trace-Back Techniques for Survivor Memory Management in the Viterbi Algorithm", pp. 90 and 92.

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