Method of and circuit arrangement for decoding RS-coded data sig

Details Method of and circuit arrangement for decoding RS-coded data sig Method of and circuit arrangement for decoding RS-coded data sig

1995-01-27

1996-02-06

Envall, Jr., Roy N.

Excavating

371 381, G06F 1100

Patent

active

054901545

ABSTRACT:
A method of and a circuit arrangement for decoding RS-coded data signals is which data signals may be coded both in accordance with a code generator polynomial

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"On-The-Fly Decoder For Multiple Byte Errors", by A. M. Patel, IBM J. Res. Develop. vol. 30, No. 3, May 1986, pp. 259-269.
"A 40-MHZ Encoder-Decoder Chip Generated By A Reed-Solomon Code Compiler", by P. Tong, Proceedings of the IEEE 1990 Custom Integrated Circuits Conferrence, May 13-16, 1990, pp. 13.5.1-13.5.4.

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