Analog signal level monitor

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Details

307360, 340347AD, 364582, 364606, G06J 100

Patent

active

043028128

ABSTRACT:
The present invention relates to an analog signal level monitor designed according to the distribution function of an analog input signal, where it is known that the percentage of time an analog input voltage spends within a desired level of operation of, for example, an A/D converter is directly related to its distribution function. Positioned at the output of an exemplary A/D converter, the present invention comprises a logic circuit (24) designed to output a first signal when the conversion is within this desired level and a second signal otherwise. The logic circuit output is passed through a normalized meter (22, 25), which provides an indication that directly corresponds to the above-described percentage, thereby indicating the optimality of the input signal level with respect to the level of operation. Alternatively, the present invention may be used to determine the maximum clock rate of a device, as for example, an A/D converter.

REFERENCES:
patent: 3400279 (1968-09-01), Grant
patent: 3633202 (1972-01-01), Kuckein et al.
patent: 3809925 (1974-05-01), Hertz
patent: 3877025 (1975-04-01), Maio
patent: 4023019 (1977-05-01), Leibowitz et al.
patent: 4125896 (1978-11-01), Metcalf
patent: 4153849 (1979-05-01), Hall et al.
Havener; "Catch Missing Codes in A/D Converters . . ."; Electronic Design 16, Aug. 2, 1975; pp. 58-64.

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