Voltage booster circuit

Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – With specific source of supply or bias voltage

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

327534, 327537, 327337, G05F 302

Patent

active

054898706

ABSTRACT:
A booster circuit which can cancel the back bias effect, can prevent the increase of the surface area of the circuit and the power consumption, prevent the complication of the clock generation circuit, and prevent lowering of the current capability, wherein a boosting stage is constituted by forming an nMOS transistor NT for carrying the charges and nMOS transistor NTB for transferring the voltage inside a p-well formed inside an n-well which is formed on a p-type semiconductor substrate and biased to a predetermined potential, constituted so that the source voltage of the nMOS transistor NT for carrying the charges which rise at the boosting is transferred via the nMOS transistor NTB for transferring the voltage to the substrate, that is, the p-well, whereby the back bias effect is suppressed.

REFERENCES:
patent: 4384218 (1983-05-01), Shimotori et al.
patent: 5081371 (1992-01-01), Wong

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Voltage booster circuit does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Voltage booster circuit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Voltage booster circuit will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2177367

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.