1974-03-07
1976-09-07
Wojciechowicz, Edward J.
357 41, 357 49, 357 52, 357 55, 357 59, H01L 2978, H01L 2702, H01L 2904, H01L 2712
Patent
active
039797651
ABSTRACT:
A MOS semiconductor device and method for forming same, including a semiconductor body of first conductivity type having a planar surface, said body having spaced grooves therein opening through said surface with insulating material filling said grooves and extending to the surface of said body. Spaced source and drain regions of second conductivity type are formed in the body in areas between said grooves filled with insulating material extending to the surface, and providing a channel region therebetween. An insulating layer is formed on said surface, and having a portion of relatively precise thickness overlying the channel region. A layer of semiconductor material is formed on said portion of the insulating layer, a protective layer formed on said insulating layer and said layer of semiconductor material, and lead means formed on said protective layer and extending through said protective layer to contact said source and drain regions and said semiconductor layer.
REFERENCES:
patent: 3748187 (1973-07-01), Aubuchon et al.
patent: 3751722 (1973-08-01), Richman
patent: 3752711 (1973-08-01), Kooi et al.
patent: 3849216 (1974-11-01), Salters
patent: 3873383 (1975-03-01), Kooi
Dana William H.
Pfeiffer C. Richard
Signetics Corporation
Wojciechowicz Edward J.
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