Method for making a high capacitance multi-level storage node fo

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437 60, 437915, H01L 218244

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054895448

ABSTRACT:
A method for making high capacitance multi-level storage node contact is proposed for high density SRAMs. The proposed contact connects several poly levels to diffusion and to a trench capacitor, in one contact. The high storage node capacitance provided by the trench capacitor substantially reduces the soft error rate probability of the cell. The use of a single contact to connect several levels reduces the area. The contact preferably uses TiN as a barrier layer to reduce dopant diffusion between different poly layers.

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"High Density SRAM Structure with a New Three-Dimensional, High- . . . " J. P. Gambino et al IBM Tech. Disc. Bul. V. 34 #2 Jul. 1991 pp. 255-258.
"High-Density CMOS SRAM Cell" W. H. Chang IBM Tech. Disc. Bulletin V. 34 #6 Nov. 1991 pp. 95-96.
"High Density Thin Film Transistor Load SRAM Cell Using Trench . . . " T. V. Rajeevakumar IBM Tech. Disc. Bul. V. 36 #09A Sep. 1993 pp. 581-582.

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