Method of forming a MOS device having a localized anti-punchthro

Details Method of forming a MOS device having a localized anti-punchthro Method of forming a MOS device having a localized anti-punchthro

1994-12-01

1996-02-06

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 26, 437 29, 437 40, 437 44, H01L 218234

Patent

active

054895430

ABSTRACT:
A method of forming a MOS device having a localized anti-punchthrough region, which is adjacent to but is not in contact with source/drain regions of the MOS device. A trench is formed by depositing a conducting layer on an oxide layer located on a channel region of the MOS device. The trench is used as a self-alignment mask for a subsequent implantation process to form the localized anti-punchthrough region.

REFERENCES:
patent: 4011105 (1977-03-01), Paivinen et al.
patent: 5270234 (1993-12-01), Huang et al.
patent: 5399508 (1995-03-01), Nowak
patent: 5413949 (1995-05-01), Hong
patent: 5429956 (1995-07-01), Shell et al.
patent: 5434093 (1995-07-01), Chau et al.

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