Process of fabricating a bipolar junction transistor

Fishing – trapping – and vermin destroying

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437 28, 437154, 437152, 148DIG10, H01L 218222

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054895413

ABSTRACT:
A process of fabricating a bipolar junction transistor forms, on the substrate, a masking layer including an opening, an intermediate masking portion surrounded by the opening and an outer masking portion. The masking layer consists of a pad oxide and a silicon nitride. A photoresist is then formed on the outer masking portion. A first ion implantation process at a relatively low dose and a relatively high energy is performed to form a base region underlying the intermediate masking portion, and a second ion implantation process at a relatively high dose and a relatively low energy is performed to form a base contact region underlying the opening. Then, the photoresist is removed. A field oxide is grown in the opening of the masking layer, followed by removing the masking layer. A highly-doped polysilicon layer is deposited over the structure, and a rapid thermal annealing process is performed to diffuse the impurities within the polysilicon layer into the substrate to form an emitter region in the base region and to form a collector contact region, by using the field oxide as a mask.

REFERENCES:
patent: 4839302 (1989-06-01), Kameyama et al.
patent: 5188972 (1993-02-01), Shum et al.
patent: 5279976 (1994-01-01), Hayden et al.
patent: 5411900 (1995-05-01), Nagel

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