Fishing – trapping – and vermin destroying
Patent
1995-03-22
1996-02-06
Fourson, George
Fishing, trapping, and vermin destroying
437 34, 437 44, 437 57, 437931, H01L 218228
Patent
active
054895405
ABSTRACT:
A novel CMOS fabrication process that eliminates several masks of a conventional process by delaying application of a well mask to a semiconductor structure until after formation of isolation regions and gate structures. Providing for three separate implant steps and selectively implanting dopants through an exposure window of the well mask, through gate structures, and through the well mask allows formation of the well region, and source/drain regions in the well region, and in the region covered by the well mask. When LDD implants are desired, removal of a lateral spacer on the gate overlying the well region and subsequent LDD implant through the mask region introduces the LDD implant. Separate masks for source/drain regions and LDD regions are not required. In an alternate embodiment, the LDD implant is introduced prior to formation of lateral spacers on gate structures and application of the well mask, providing the LDD implant in both channels, and eliminating a requirement for lateral spacer removal.
REFERENCES:
patent: 4764477 (1988-08-01), Chang et al.
patent: 4968639 (1990-11-01), Bergonzoni
patent: 4997782 (1991-03-01), Bergonzoni
Chang Kuang-Yeh
Liu Yowjuang W.
Advanced Micro Devices , Inc.
Booth Richard A.
Fourson George
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