Solid state binary logic signal source for electronic timepiece

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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Details

307251, 307296, 307214, 307215, 58 23BA, 58 50R, H03K 1760

Patent

active

039796086

ABSTRACT:
A pulse generator provides a first and a second train of pulses, the triggering edges of the second pulses occurring within the inactive period of the first train pulses. The first train pulses are coupled to a reset terminal of an S-R flip-flop and to a control terminal of a solid state switching device to establish a low impedance conduction path during the inactive periods of the first train pulses between a voltage source via a normally open switch and a set terminal of the S-R flip-flop. The Q output of the flip-flop is connected to a data input terminal of a data type flip-flop (D flip-flop). The second train pulses are applied to a clock input terminal of the D flip-flop to trigger the same at the triggering edges thereof. An output pulse will be delivered at the Q output of the D flip-flop when the switch is closed.

REFERENCES:
patent: 3795823 (1974-03-01), Morgan et al.
patent: 3823550 (1974-07-01), Bergey
patent: 3917960 (1975-11-01), Kane

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