Non-volatile semiconductor memory

Static information storage and retrieval – Floating gate – Particular biasing

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Details

36518905, 36518907, G11C 700

Patent

active

056403488

ABSTRACT:
There is provided non-volatile semiconductor memory a capable of performing an accurate program verify, by suppressing the power supply noise generated at the time of a program verify. An output buffer includes a mode discriminating circuit for discriminating an ordinary reading mode and a programming mode, and a load circuit. Connection/disconnection of the load circuit is determined by a NOR gate receiving a verify activation signal which is activated at the time of verify, in such a manner that the load circuit is put in a disconnected condition at the time of the ordinary reading, and in a connected condition at the time of the program verify.

REFERENCES:
patent: 5434819 (1995-07-01), Matsuo et al.

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