Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

1995-12-07

1997-06-17

Nelms, David C.

Static information storage and retrieval

Format or disposition of elements

365 63, 36523006, G11C 502, G11C 506, G11C 800

Patent

active

056403380

ABSTRACT:
A semiconductor memory device comprising a plurality of memory cell arrays each of which includes a plurality of memory cells, a plurality of word lines connected to the memory cells for addressing them, a plurality of bit lines connected to the memory cells for transferring data from/to them, a first word line decoder connected to the word lines for activating them, and a bit line decoder connected to the bit lines for activating them. The semiconductor memory device further comprises a plurality of metal lines. Each of the metal lines is formed every four of the word lines and connected to the first word line decoder. The semiconductor memory device further comprises a plurality of second word line decoders. Each of the second word line decoders is connected to a corresponding one of the metal lines to address one of corresponding four of the word lines. The semiconductor memory device further comprises a control signal supply circuit for supplying a plurality of control signals to each of the second word line decoders so that it can address one of the corresponding four word lines.

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patent: 5432116 (1995-07-01), Keum et al.
patent: 5460996 (1995-10-01), Ryou
patent: 5468670 (1995-11-01), Ryou
patent: 5519665 (1996-05-01), Chishiki
patent: 5535153 (1996-07-01), Saeki
patent: 5544096 (1996-08-01), Takasugi

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