Boots – shoes – and leggings
Patent
1976-08-30
1978-05-02
Chapnick, Melvin B.
Boots, shoes, and leggings
G06F 748, G06F 1300
Patent
active
040878546
ABSTRACT:
A minicomputer system comprising an arithmetic control unit integrated on a one-chip semiconductor device using n-channel silicon gate E/D MOS technology and a control storage separate from and connected to the arithmetic control unit for storing microinstructions. The arithmetic control unit includes two kinds of read only memories, each having a small memory capacity. The first read only memory stores start addresses of specific microinstructions for phase control, an illegal instruction trap and an initialization trap. The second read only memory stores auxiliary microinstructions to handle operations involving an accumulator, general registers and an instruction register in the arithmetic control unit.
REFERENCES:
patent: 3702988 (1972-11-01), Haney et al.
patent: 3757306 (1973-09-01), Boone
patent: 3757308 (1973-09-01), Fosdick
patent: 3793631 (1974-02-01), Silverstein et al.
patent: 3878514 (1975-04-01), Faber
patent: 3938098 (1976-02-01), Garlic
patent: 3962682 (1976-06-01), Bennett
patent: 3984813 (1976-10-01), Chung
Altman; "Single-chip Microprocessors open up a New World of Applications" in Electronics, Apr. 18, 1974, pp. 81-87.
Reyling, Jr.; "Single-chip Microprocessor Employs Minicomputer Word Length" in Electronics, Dec. 26, 1974, pp. 87-93.
Kinoshita Tsuneo
Sato Kazuyuki
Chapnick Melvin B.
Tokyo Shibaura Electric Co. Ltd.
LandOfFree
Minicomputer system with an arithmetic control unit integrated o does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Minicomputer system with an arithmetic control unit integrated o, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Minicomputer system with an arithmetic control unit integrated o will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2162153