Semiconductor device with solder overflow prevention geometry

Details Semiconductor device with solder overflow prevention geometry Semiconductor device with solder overflow prevention geometry

1986-12-24

1987-09-08

James, Andrew J.

357 65, 357 68, 357 71, 357 81, H01L 2328

Patent

active

046927883

ABSTRACT:
A semiconductor apparatus comprises a semiconductor pellet having upper and lower main surfaces, and upper and lower protector plates against thermal stress soldered to the upper and lower main surfaces, respectively, of the semiconductor pellet wherein the whole area of the lower protector plate is larger than the lower main surface but has an inner part smaller than the lower main surface and made thicker than an outer part by being bounded with a step, the inner portion being soldered to the pellet at the lower main surface region, whereby the surface of the outer portion is spaced from the lower main surface by a distance corresponding to the height of the step.

REFERENCES:
patent: 3311798 (1967-03-01), Gray
patent: 3399332 (1968-08-01), Savolainen
patent: 3434018 (1969-03-01), Boczar et al.
patent: 3657611 (1972-04-01), Yoneda
patent: 4143395 (1979-03-01), Sekiba
patent: 4248920 (1981-02-01), Yoshizumi et al.

Affiliated with

Also associated with

Rating

Semiconductor device with solder overflow prevention geometry does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor device with solder overflow prevention geometry, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor device with solder overflow prevention geometry will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2161782