Integrated circuit device for writing and reading information

Details Integrated circuit device for writing and reading information Integrated circuit device for writing and reading information

1981-05-13

1987-09-08

James, Andrew J.

357 42, 357 231, 357 235, H01L 2936

Patent

active

046927859

ABSTRACT:
An integrated circuit device for writing and reading information comprising an array of plural non-volatile memory elements of insulated-gate field effect type formed on a semiconductor substrate of one conductivity type; plural sets of two complementary insulated-gate type field effect transistors of P-channel type and N-channel type formed on the substrate, which transistors constitute a control circuit for the memory elements; and a latch-up suppressant, comprising a long and narrow semiconductor region of the one conductivity type which has an impurity concentration higher than that of the substrate and is formed between the array and the control circuit in a surface region of the substrate, with a predetermined voltage applied directly to the semiconductor region.

REFERENCES:
patent: 3955210 (1976-05-01), Bhatia et al.
patent: 4149176 (1979-04-01), Satou et al.
patent: 4152717 (1979-05-01), Satou et al.
patent: 4167747 (1979-09-01), Satou et al.
patent: 4327368 (1982-04-01), Uchida

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