Junction field effect transistor and method of fabricating

Details Junction field effect transistor and method of fabricating Junction field effect transistor and method of fabricating

1986-05-12

1987-09-08

Clawson, Jr., Joseph E.

357 20, 357 55, H01L 2980

Patent

active

046927808

ABSTRACT:
Junction field effect transistor, specifically a static induction transistor, and method of fabricating. An epitaxial layer of high resistivity N-type silicon is grown on a substrate of low resistivity silicon. The surface of the epitaxial layer is coated with silicon nitride, portions of the silicon nitride are removed, and the silicon is etched to form parallel grooves with interposed ridges of silicon. A layer of silicon nitride is applied and then removed except from the side walls of the grooves. Exposed silicon at the bottoms of the grooves is converted to silicon dioxide to build up layers of silicon dioxide in the grooves. The remaining silicon nitride is removed. P-type conductivity imparting material is ion implanted into alternate (gate) ridges and diffused to form gate regions which extend laterally beneath the silicon dioxide in the adjacent grooves. N-type conductivity imparting material is ion implanted in the top of the intervening (source) ridges. Metal contacts are applied to the gate ridges, the source ridges, and the substrate.

REFERENCES:
patent: 4404575 (1983-09-01), Shizawa

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