Method of making a low capacitance antifuse having a pillar loca

Details Method of making a low capacitance antifuse having a pillar loca Method of making a low capacitance antifuse having a pillar loca

1995-06-07

1997-06-17

Bowers, Jr., Charles L.

Fishing, trapping, and vermin destroying

437195, 437922, H01L 2170

Patent

active

056396848

ABSTRACT:
A low-capacitance antifuse (34 or 76) is provided for use in user-programmable integrated circuitry. The antifuse includes first (38 or 80) connection metal layers and second (54 or 94) connection metal layers. Between the metal layers is dielectric layer (52 or 82), and between the dielectric layer and at least one of the metal layers is a conductive layer in the form of pillar (40) or stack (81). The pillar or stack extends the separation between the metal layers thereby decreasing the capacitance of the antifuse.

REFERENCES:
patent: 5166556 (1992-11-01), Hsu et al.
patent: 5248632 (1993-09-01), Tung et al.
patent: 5329153 (1994-07-01), Dixit
patent: 5369054 (1994-11-01), Yen et al.
patent: 5373169 (1994-12-01), McCollum et al.
patent: 5427979 (1995-06-01), Chang

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